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Co-verification of Hardware and Software for ARM SoC Design by Jason Andrews

By Jason Andrews

Hardware/software co-verification is tips on how to ensure that embedded approach software program works properly with the undefined, and that the has been correctly designed to run the software program effectively -before huge sums are spent on prototypes or production.

This is the 1st ebook to use this verification strategy to the quickly growing to be box of embedded systems-on-a-chip(SoC). As conventional embedded process layout evolves into single-chip layout, embedded engineers has to be armed with the required info to make informed judgements approximately which instruments and technique to set up. SoC verification calls for a mixture of services from the disciplines of microprocessor and machine structure, good judgment layout and simulation, and C and meeting language embedded software program. formerly, the suitable info on the way it all matches jointly has no longer been to be had. Andrews, a famous professional, presents in-depth information regarding how co-verification rather works, the right way to succeed utilizing it, and pitfalls to prevent. He illustrates those techniques utilizing concrete examples with the ARM center - a know-how that has the dominant marketplace percentage in embedded approach product layout. The spouse CD-ROM includes all resource code utilized in the layout examples, a searchable ebook model, and valuable layout instruments.

* the one booklet on verification for systems-on-a-chip (SoC) at the market

* Will keep engineers and their businesses time and cash by way of displaying them the right way to accelerate the trying out strategy, whereas nonetheless fending off high priced mistakes

* layout examples use the ARM middle, the dominant expertise in SoC, and all of the resource code is integrated at the accompanying CD-Rom, so engineers can simply use it of their personal designs

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Unlike Verilog, which was conceived by a private company, VHDL is a product of the VHSIC program funded by the Department of Defense in the 1970s and 1980s. It was intended to serve as a way to document circuits as well as a modeling language for simulation. VHDL was first approved as the IEEE 1076 standard in 1987 and was updated in 1993 to the IEEE 1164 standard. While Verilog tends to look more like C, VHDL tends to look more like Ada, due to its roots in the Department of Defense. For several years the industry has debated about which HDL is better, Verilog or VHDL.

The path from the CPU bus to this register is not so easy to trace. A fragment of how a configuration register for a memory controller is implemented is shown in Figure 2-7. For this 32-bit register only 8 bits are meaningful and the register is implemented as multiple smaller registers that are concatenated together to form the register value when read from software. // // // // // ----------------------------------------------------------------------------Offset | Register Name | R/W | Valid Bits | Reset | Description ----------------------------------------------------------------------------0x00 MPMCStConfig R/W 20:19,8:6, 0x0 Static Memory 3,1:0 configuration assign MPMCStConfig = {HWDataReg20to19Q, 10'b0000000000, HWDataReg8to6Q[8:6], 2'b00, HWDataReg4to0Q[3], 1'b0, HWDataReg4to0Q[1:0]); Figure 2-7: Example register implementation 38 Hardware and Software Design Process Software Development Tools Editor OK, maybe an editor is not really a software development tool, but most software engineers spend more time with their editor than any other program.

The memory map may also define what happens if addresses where no physical memory exists are accessed. Figure 2-5 shows an example of a memory map. 35 Chapter 2 0xFFFFFFFF System Bus 0x100C0000 Alternate SRAM 0x10040000 Control Registers 0x10000000 SDRAM 0x80000 SRAM 0x0 Figure 2-5: Example memory map Common types of memory in an embedded system are ROM to hold the initial software to run on the CPU, flash memory, DRAM, SDRAM, or DDR memory, SRAM for fast data storage, and memory mapped peripherals.

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